Analysis of thin film SOI material defect requirements for advanced circuit applications [DRAMs]

As thin film SOI (TFSOI) moves from R&D to pilot production, demonstration of circuit yields is crucial. Understanding the required defect levels of the TFSOI starting materials for targeted applications is essential to material suppliers as well as IC manufacturers. Comparative analysis of defect levels in various TFSOI materials and their potential impact on circuit yields has been summarized. Many companies are working on correlation between circuits and material defect levels; however, this data can be process specific and tends to be of limited access. This work applies an enhanced version of Poisson´s equation (commonly used to calculate yield vs. defect densities) to examine required defect levels for application of TFSOI to advanced devices. Discrete defects are analyzed including surface particles (light scattering centers, LSC), HF defects, silicon threading dislocations, and buried oxide (BOX) defects. Some measured material data is included to note the present status and highlight potential challenges in achieving required levels