Design of ST planar integrated inductors based on INFINISCALE flow

IC design is driven by two simultaneous trends: miniaturization of microelectronics technology, and telecommunication market expansion. When considered at a user level, these trends seem to be compatible: by making devices smaller, integration of a larger number of functionalities in your smart phone is made possible and thus boosts the development of the telecom market. From an IC designer point of view, both trends are challenging: On one side, the technology shrinkage, makes components/MEMS/circuits more and more sensitive to design/process parameter variations. This requires more than ever accurate predictions as early as possible in the design flow and better collaborations between designers and technologists. . On the other side, time-to-market diktat imposes short design cycles. Up to now, these constraints have been handled using iterative and time consuming techniques such as iterative try-and-error loops at design step and iterative loops between designers and technologists In order to overcome the IC design bottleneck InfiniScale [1] approach offers a proven solution by proceeding to a smart use of designers/technologists/physicists experiences. This solution based upon innovative and cost-effective behavioral modeling techniques, and a complete model-based flow generates designs optimized for performance in matters of hours. This paper presents the InfiniScale total solutions flow (modeling and sizing) applied to a ST microelectronics planar integrated inductor.