MOSFET BGA package

The trend towards miniaturization in electronics is the main driver for small form factor packages. The industry has taken various evolutionary steps towards this objective: Small Outline Integrated Circuit (SOIC) to Thin Shrink Small Outline Packages (TSSOP), Quad Flat Packs (QFP) to Thin Quad Flat Packs (TQFP). Typical Chip/Package area ratios for SOJ/TSOP packages have been reported in the range of 40%. An ultimate goal would be to develop a package which would be the size of the die itself. Flip Chip also known in the industry as IBM´s C-4 technology can be considered to be an early example of a die sized package where the chip is directly attached to a substrate using solder bumps. This technology had some difficulties which limited its implementation: it could not be used easily on FR4 boards without a special underfill process (this was needed to minimize stress issues due to coefficient of expansion mismatch between die and printed circuit board substrates). Other issues centered around testing, handling and shipping of bare die. Even today, there are few vendors of Known Good Die (KGD). Contract manufacturing offering flip chip assembly is also limited