DocumentCode
2170455
Title
Layout driven technology mapping
Author
Pedram, Massoud ; Bhat, Narasimha
Author_Institution
University of California
fYear
1991
fDate
21-21 June 1991
Firstpage
99
Lastpage
105
Keywords
Circuit synthesis; Delay; Integrated circuit interconnections; Integrated circuit technology; Libraries; Logic programming; Network synthesis; Permission; Timing; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1991. 28th ACM/IEEE
Conference_Location
IEEE
Print_ISBN
0-89791-395-7
Type
conf
Filename
979696
Link To Document