Yoshikawa, Ko ; Ichiryu, Hiroshi ; Tanishita, Hisato ; Suzuki, Sigenobu ; Nornizu, N. ; Kondoh, Akira
Author_Institution :
NEC Corporation
fYear :
1991
fDate :
21-21 June 1991
Firstpage :
112
Lastpage :
117
Keywords :
BiCMOS integrated circuits; Delay effects; Design optimization; Heuristic algorithms; National electric code; Partitioning algorithms; Permission; Signal mapping; Timing; Tree data structures;
