A flexible layered architecture for accurate digital baseband algorithm development and verification

Many emerging communication technologies significantly increase the complexity of the physical layer and have dramatically increased the number of operating configurations. To ensure maximum performance, designers have to optimize their algorithm implementations, which requires for comprehensive performance testing in all possible operating modes various channel conditions. This paper presents a flexible and affordable framework for baseband algorithm development and performance verification for digital communication systems with an arbitrary number of modules, each operating at a possibly different sampling rate with various latencies. The proposed architecture is scalable to support complex scenarios, such as multiple antenna systems, and is compact enough to be implemented within a single field-programmable gate array.