A New Fault Tolerant Routing Algorithm for Advance Irregular Augmented Shuffle Exchange Network

Interconnection Network is a significant component in parallel processing system (PPS). Multistage interconnection network (MIN) plays a vital role in order to design efficient PPS. In the present research scenario, obtaining a cost effective and fault tolerant MIN is a critical challenge. This paper introduces a new fault tolerant irregular MIN named as Advance Irregular Augmented Shuffle Exchange Network (AIASEN). The proposed MIN is the advance form of irregular augmented shuffle exchange network (IASEN). It has been observed that AIASEN provides full access capability in presence of multiple faults in the network. It shows better tolerance fault at minimum cost as compare to the IASEN.