Title :
Advanced Preclean for Integration of PECVD SiOCH (k=2.5) Dielectrics with Copper Metallization Beyond 45nm Technology
Author :
Fu, X. ; Forster, J. ; Yu, J. ; Gopalraja, P. ; Bhatnagar, A. ; Ahn, S. ; Demos, A. ; Ho, P.
Author_Institution :
Appl. Mater. Inc., Santa Clara, CA
Abstract :
Preclean is a critical process step in Cu metallization to ensure device reliability. For the integration of ultra low k (kles2.5) dielectrics, an advanced preclean (APC) technology has been developed and characterized using PECVD SiOCH (k=2.5) dielectrics. With the optimal hardware and process, this technology minimizes plasma damage, causing no measurable k increase and having the lowest impact to other properties of the low k film. At the same time it effectively removes etch residues in dielectric structures and native oxides on the underneath metal surface prior to Cu barrier deposition. The electrical tests demonstrated that APC not only met the reliability requirements for typical BEOL structures but also significantly reduced line-to-line capacitance degradation over ultra low k structures, offering a superior alternative to the conventional preclean technologies
Keywords :
integrated circuit metallisation; integrated circuit reliability; low-k dielectric thin films; plasma CVD coatings; silicon compounds; surface cleaning; 45 nm; Cu; PECVD; SiOCH; advanced preclean process; barrier deposition; capacitance degradation; copper metallization; device reliability; ultra low k dielectrics; Copper; Dielectric measurements; Etching; Hardware; Metallization; Plasma applications; Plasma devices; Plasma measurements; Plasma properties; Testing;
Conference_Titel :
Interconnect Technology Conference, 2006 International
Conference_Location :
Burlingame, CA
Print_ISBN :
1-4244-0104-6
DOI :
10.1109/IITC.2006.1648644
