Title :
Graph partitioning for concurrent test scheduling in VLSI circuit
Author :
Chen, Chien In Henry
Author_Institution :
Wright State University
Keywords :
Automatic testing; Built-in self-test; Circuit testing; Combinational circuits; Logic testing; Performance evaluation; Permission; Registers; Space exploration; Very large scale integration;
Conference_Titel :
Design Automation Conference, 1991. 28th ACM/IEEE
Conference_Location :
IEEE
Print_ISBN :
0-89791-395-7
