Title :
Delay test effectiveness evaluation of LSSD-Based VLSI logic circuits
Author :
Wu, David M. ; Radke, Charles E.
Author_Institution :
IBM East Fishkill
Keywords :
Circuit testing; Delay effects; Logic circuits; Logic testing; Materials testing; Permission; System testing; Test pattern generators; Timing; Very large scale integration;
Conference_Titel :
Design Automation Conference, 1991. 28th ACM/IEEE
Conference_Location :
IEEE
Print_ISBN :
0-89791-395-7
