Title :
A high-level debug environment for communication-centric debug
Author :
Goossens, Kees ; Vermeulen, Bart ; Nejad, Ashkan Beyranvand
Author_Institution :
NXP Semicond. Res., SOC Archit. & Infrastruct., Eindhoven, Netherlands
Abstract :
A large part of a modern SOC´s debug complexity resides in the interaction between the main system components. Transaction-level debug moves the abstraction level of the debug process up from the bit and cycle level to the transactions between IP blocks. In this paper we raise the debug abstraction level further, by utilising structural and temporal abstraction techniques, combined with debug data interpretation and logical communication views. The combination of these techniques and views allow us, among others, to single-step and observe the operation of the network on a per-connection basis. As an example, we show how these higher-level abstractions have been implemented in the debug environment for the AEligthereal NOC architecture and present a generic debug API, which can be used to visualise an SOC´s state at the logical communication level.
Keywords :
high level synthesis; network-on-chip; AEligthereal NOC architecture; IP blocks; abstraction level; communication-centric debug; generic debug API; high-level debug environment; logical communication views; structural abstraction techniques; temporal abstraction techniques; Clocks; Computer architecture; Hardware; Network-on-a-chip; Prototypes; Silicon; Software debugging; Software prototyping; System-on-a-chip; Visualization;
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09.
Conference_Location :
Nice
Print_ISBN :
978-1-4244-3781-8
DOI :
10.1109/DATE.2009.5090658