DocumentCode
2171662
Title
Influences of SIMD architectures for scattered data interpolation algorithm
Author
Tournier, Jean-Charles ; Naef, Martin
Author_Institution
Corp. Res., ABB Inc., Raleigh, NC, USA
fYear
2010
fDate
28-30 March 2010
Firstpage
109
Lastpage
110
Abstract
In this paper, we are investigating the performance of several IDW implementations on different SIMD architectures (Single Instruction Multiple Data). The SIMD architectures addressed in this paper are considered cost effective and readily available on the desktop as compared to super-computers such as the IBM Roadrunner or the Cray XT5. Two main classes of SIMD architectures can be identified from the range of products available now: (a) the architectures that are integrated in the CPU itself, such as SSE or AltiVec; and (b) the architectures located on a dedicated board such as the GPGPUs from Nvidia or ATI. This paper evaluates one SIMD architecture selected from each group. The evaluation is based on the performance measured on each architecture over various datatypes and different problem sizes.
Keywords
data handling; data structures; instruction sets; interpolation; SIMD architectures; datatypes; scattered data interpolation algorithm; single instruction multiple data architecture; Costs; Hardware; Image processing; Image reconstruction; Interpolation; Partial differential equations; Scattering; Size measurement; Surface reconstruction; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Performance Analysis of Systems & Software (ISPASS), 2010 IEEE International Symposium on
Conference_Location
White Plains, NY
Print_ISBN
978-1-4244-6023-6
Electronic_ISBN
978-1-4244-6024-3
Type
conf
DOI
10.1109/ISPASS.2010.5452056
Filename
5452056
Link To Document