DocumentCode :
2171674
Title :
Evaluating UML2 modeling of IP-XACT objects for automatic MP-SoC integration onto FPGA
Author :
Arpinen, Tero ; Koskinen, Tapio ; Salminen, Erno ; Hämäläinen, Timo D. ; Hännikäinen, Marko
Author_Institution :
Dept. of Comput. Syst., Tampere Univ. of Technol., Tampere
fYear :
2009
fDate :
20-24 April 2009
Firstpage :
244
Lastpage :
249
Abstract :
IP-XACT is a standard for describing intellectual property metadata for System-on-Chip (SoC) integration. Recently researchers have proposed visualizing and abstracting IP-XACT objects using structural UML2 model elements and diagrams. Despite the number of proposals at conceptual level, experiences on utilizing this representation in practical SoC development environments are very limited. This paper presents how UML2 models of IP-XACT features can be utilized to efficiently design and implement a multiprocessor SoC prototype on FPGA. The main contribution of this paper is the experimental development of a multiprocessor platform on FPGA using UML2 design capture, IP-XACT compatible components, and design automation tools. In addition, modeling concepts are improved from earlier work for the utilized integration methodology.
Keywords :
field programmable gate arrays; industrial property; microprocessor chips; system-on-chip; FPGA; IP-XACT objects; UML2 modeling; automatic MP-SoC integration; design automation tools; intellectual property metadata; multiprocessor; system-on-chip integration; Design automation; Field programmable gate arrays; Intellectual property; Logic arrays; Object oriented modeling; Proposals; Prototypes; System-on-a-chip; Unified modeling language; Visualization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09.
Conference_Location :
Nice
ISSN :
1530-1591
Print_ISBN :
978-1-4244-3781-8
Type :
conf
DOI :
10.1109/DATE.2009.5090665
Filename :
5090665
Link To Document :
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