DocumentCode
2171706
Title
A unified approach for the synthesis of self-testable finite state machines
Author
Eschermann, Bernhard ; Wunderlich, Hans-Joachim
Author_Institution
Universitat Karlsruhe
fYear
1991
fDate
21-21 June 1991
Firstpage
372
Lastpage
377
Keywords
Automata; Automatic testing; Built-in self-test; Circuit faults; Circuit synthesis; Circuit testing; Hardware; Permission; Registers; Sequential circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1991. 28th ACM/IEEE
Conference_Location
IEEE
Print_ISBN
0-89791-395-7
Type
conf
Filename
979744
Link To Document