DocumentCode :
2172120
Title :
A branching process model for observability analysis of combinational circuits
Author :
Sastry, Sarma ; Majumdar, Amitava
Author_Institution :
University of Southern California
fYear :
1991
fDate :
21-21 June 1991
Firstpage :
452
Lastpage :
457
Keywords :
Benchmark testing; Circuit analysis; Circuit faults; Circuit simulation; Circuit testing; Combinational circuits; Electrical fault detection; Observability; Permission; Sequential analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1991. 28th ACM/IEEE
Conference_Location :
IEEE
Print_ISBN :
0-89791-395-7
Type :
conf
Filename :
979758
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2172120
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