DocumentCode
2172451
Title
CMOS current steering logic: Toward a matured technique for mixed-mode applications
Author
Sáez, R. T L ; Kayal, M. ; Declercq, M.
Author_Institution
Electron. Lab., Swiss Fed. Inst. of Technol., Lausanne, Switzerland
fYear
1997
fDate
5-8 May 1997
Firstpage
349
Lastpage
352
Abstract
This paper presents a detailed analysis of the CMOS Current Steering Logic (CSL) technique and compares experimentally its digital switching noise to that of the CMOS static logic. Theoretical analysis of the CSL inverter is developed. More complex gates using this technique are presented. Results are validated by simulations and measurement
Keywords
CMOS logic circuits; circuit CAD; circuit analysis computing; integrated circuit noise; logic CAD; logic gates; mixed analogue-digital integrated circuits; CMOS current steering logic; CSL inverter; complex gates; digital switching noise; logic simulations; mixed-mode applications; CMOS logic circuits; CMOS technology; Circuit noise; Integrated circuit noise; Logic circuits; Noise generators; Noise measurement; Power supplies; Pulse inverters; Switching circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1997., Proceedings of the IEEE 1997
Conference_Location
Santa Clara, CA
Print_ISBN
0-7803-3669-0
Type
conf
DOI
10.1109/CICC.1997.606645
Filename
606645
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