Influence of cascode and simple current mirrors in inner product implementations for CMOS imagers

CMOS image sensors are suitable for smart camera designs because this technology allows the implementation of the pixel array and processing circuitry on the same chip. Due to this feature, CMOS imagers have been studied in industry and academy for various applications. This paper refers to an imager that performs data compression using analog current-mode hardware. The compression is based on linear transform, VQ and DPCM, and it was implemented in a previous imager fabricated with 0.35 µm CMOS technology. Experimental results obtained from this chip suggested some improvements for a new design, which was implemented with 0.18 µm CMOS technology. In this paper we highlight and justify the use of cascode current mirrors instead of simple current mirrors for the linear transform inner product operation. This modification leads to a significant increase in the image PSNR at the expense of a more complex layout. We also present a quadratic model used to reduce the distortion caused by the photodiode readout circuit.