Title :
Timing verification on a 1.2M-device full-custom CMOS design
Author :
Pan, Jengwei ; Biro, Larry ; Grodstein, Joel ; Grundmann, Bill ; Yen, Yao-Tsung
Author_Institution :
Digital Equipment Corporation
Keywords :
Circuit simulation; Clocks; Logic devices; Parasitic capacitance; Permission; Propagation delay; SPICE; Semiconductor device modeling; Timing; Transistors;
Conference_Titel :
Design Automation Conference, 1991. 28th ACM/IEEE
Conference_Location :
IEEE
Print_ISBN :
0-89791-395-7
