DocumentCode
2172557
Title
Enhanced systolic arrays-a new idea
Author
Sarkar, Susanta
Author_Institution
Dept. of Electr. Eng., Tech. Univ. Nova Scotia, Halifax, NS, Canada
fYear
1993
fDate
14-17 Sep 1993
Firstpage
857
Abstract
Systolic arrays with some architectural enhancement(s) are called enhanced systolic arrays (ESAs). Two promising ESAs have been briefly reviewed in this paper. One of these two ESAs, called the tagged systolic array, has been proposed by the author. These ESAs are general-purpose arrays capable of implementing different algorithms using a single array
Keywords
systolic arrays; algorithms; architectural enhancement; enhanced systolic arrays; general-purpose arrays; tagged systolic array; Computer aided instruction; Computer architecture; Instruction sets; Notice of Violation; Routing; Systolic arrays; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Computer Engineering, 1993. Canadian Conference on
Conference_Location
Vancouver, BC
Print_ISBN
0-7803-2416-1
Type
conf
DOI
10.1109/CCECE.1993.332430
Filename
332430
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