A parallel computer for digital signal processing

Author

Toussaint, Jean ; Fortier, Paul

Author_Institution

Dept. of Electr. Eng., Laval Univ., Que., Canada

fYear

1993

fDate

14-17 Sep 1993

Firstpage

870

Abstract

The communication and synchronization schemes for a distributed memory parallel computer are studied. The main goal of this work is to develop tools to control the processes and the broadcasting of data over a parallel computer developed with Texas Instruments TMS320C40 processors. These tools must remain simple, fast and efficient to permit good speed improvement over a uniprocessor system of the same type. Digital signal processing algorithms have been used to test the functionality and the speed of these tools. Good results have been observed with a fast Fourier transform and a Viterbi decoder

Keywords

decoding; distributed memory systems; fast Fourier transforms; maximum likelihood estimation; parallel machines; signal processing; signal processing equipment; special purpose computers; synchronisation; Texas Instruments TMS320C40 processors; Viterbi decoder; algorithms; communication scheme; data broadcasting; digital signal processing; distributed memory parallel computer; fast Fourier transform; functionality; process control; speed improvement; synchronization scheme; testing; tools; uniprocessor system; Communication system control; Concurrent computing; Digital signal processing; Distributed computing; Fast Fourier transforms; Instruments; Process control; Signal processing algorithms; Testing; Viterbi algorithm;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical and Computer Engineering, 1993. Canadian Conference on

Conference_Location

Vancouver, BC

Print_ISBN

0-7803-2416-1

Type

conf

DOI

10.1109/CCECE.1993.332432

Filename

332432