DocumentCode :
2172632
Title :
Dielectric/TaN Interface Design with Self-Assembled Monolayer Liner for 45nm & Beyond Cu/Porous Low-k Damascene Interconnects
Author :
Ko, C.C. ; Lin, K.C. ; Choug, C.C. ; Bao, T.I. ; Tseng, T.C. ; Jeng, S.M. ; Yu, C.H. ; Liang, M.S.
Author_Institution :
Adv. Module Technol. Div., Taiwan Semicond. Manuf., Hsin-Chu
fYear :
2006
fDate :
5-7 June 2006
Firstpage :
204
Lastpage :
206
Abstract :
The concerns of barrier integrity in applications of porous low-k (PLK) dielectrics for Cu dual damascene (DD) interconnects have been dismissed with a novel self-assembled monolayer (SAM) approach. Results showed a 7% improvement in the PLK/TaN-interface adhesion with SAM. SAM also achieved a 30% improvement in line-line (L-L) breakdown tolerance and 100X lower leakage current @ lMV/cm when applied to Cu/PLK interconnect with k=2.5 and pore size ~ 2.0 nm without compromising effective K, Keff
Keywords :
adhesion; copper; integrated circuit interconnections; low-k dielectric thin films; monolayers; porous materials; self-assembly; tantalum compounds; 45 nm; Cu; PLK dielectrics; TaN; barrier integrity; copper interconnects; dielectric interface design; interface adhesion; line-line breakdown tolerance; porous low-k damascene interconnects; porous low-k dielectrics; self-assembled monolayer liner; Adhesives; Bonding; Dielectric breakdown; Dielectric materials; Electric breakdown; Etching; Leakage current; Manufacturing industries; Protection; Semiconductor device manufacture;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Interconnect Technology Conference, 2006 International
Conference_Location :
Burlingame, CA
Print_ISBN :
1-4244-0104-6
Type :
conf
DOI :
10.1109/IITC.2006.1648694
Filename :
1648694
Link To Document :
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