DocumentCode :
2172862
Title :
A high performance FFT library with single instruction multiple data (SIMD) architecture
Author :
Xu, Wang ; Yan, Zhang ; Shunying, Ding
Author_Institution :
Key Lab. of Network Oriented Intell., Comput., Harbin Inst. of Technol., Shenzhen, China
fYear :
2011
fDate :
9-11 Sept. 2011
Firstpage :
630
Lastpage :
633
Abstract :
Fast Fourier Transform (FFT) is the basis of Digital Signal Processing (DSP). In this paper, a high performance FFT library using radix-2 decimation in frequency (DIF) algorithm is presented which is well suited for SIMD architecture. SIMD architecture microprocessors, such as Intel and AMD, allow parallel floating point operations on contiguous data in memory. A 128-point FFT based radix-2 DIF algorithm is implemented on the Intel architecture. All arithmetic operations in FFT are optimized by SSE assembly. Twiddle factors and binary reverse array are also optimized for SIMD architecture. The library is implemented using C and Intel Streaming SIMD Extensions (SSE) assembly instructions. The performance comparison with Fastest Fourier Transform in the West (FFTW) library shows that the proposed FFT library is faster.
Keywords :
digital signal processing chips; fast Fourier transforms; floating point arithmetic; parallel processing; Intel streaming SIMD extensions; SIMD architecture microprocessors; digital signal processing; fastest Fourier transform in the West library; parallel floating point operations; radix-2 decimation in frequency algorithm; single instruction multiple data architecture; Algorithm design and analysis; Arrays; Libraries; Optimization; Registers; Signal processing algorithms; FFT; IFFT; SIMD; SSE;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Communications and Control (ICECC), 2011 International Conference on
Conference_Location :
Ningbo
Print_ISBN :
978-1-4577-0320-1
Type :
conf
DOI :
10.1109/ICECC.2011.6066463
Filename :
6066463
Link To Document :
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