Title :
3D scheduling: high-level synthesis with floorplanning
Author :
Weng, Jen-Pin ; Parker, Alice C.
Author_Institution :
University of Southern California
Keywords :
Costs; Delay effects; Delay estimation; Design engineering; High level synthesis; Integrated circuit interconnections; Permission; Prototypes; Time factors; Wiring;
Conference_Titel :
Design Automation Conference, 1991. 28th ACM/IEEE
Conference_Location :
IEEE
Print_ISBN :
0-89791-395-7