DocumentCode :
2173017
Title :
Ceramic column grid array technology with coated solder columns
Author :
Hong, Bor Zen ; Ray, Sudipta K.
Author_Institution :
Electron. Div., IBM Corp., Hopewell Junction, NY, USA
fYear :
2000
fDate :
2000
Firstpage :
1347
Lastpage :
1353
Abstract :
Flip-chip carriers are finding increasing use for high-performance ASIC and microprocessors chips. Many of these chips have a large I/O count and consequently drive chip carriers with high density second-level interconnection requirements (typically 400 to more than 1000). IBM has a range of Ceramic Ball Grid Array (CBGA) and Ceramic Column Grid Array (CCGA) offerings which cover this application range. In this paper, we describe the development of a new CCGA technology with coated solder columns which allows column attach at the very end of the module assembly process. The new approach developed was to make Pb90-Sn10 solder columns with a thin barrier layer which are joined to the module I/O pads using a lead-free Sb5-Sn95 solder preforms. The barrier layer prevents the reaction of Sn/Sb with the Pb-rich column and driving the interface towards the Sn/Pb eutectic phase with its low melting point of 183°C. As a result, during card assembly and rework of the module from the card, the column joints on the ceramic substrate do not melt. The coated CCGA structure has two beneficial attributes: being able to join to the module at the end of the module assembly (as in CBGA process), and the ability to remove the CCGA module from a card with all the columns attached to the module (like the cast CCGA structure). In this paper, the structure and attachment process of the coated CCGA and the reliability of coated CCGA connections to an organic FR-4 card are reviewed. A nonlinear finite element modeling has been carried out to study the resistance to cyclic viscoplastic deformation and related damage mechanism. A deformation-base lifetime analysis method was used for the column fatigue life prediction and was compared with the actual test data
Keywords :
ceramic packaging; finite element analysis; flip-chip devices; integrated circuit packaging; soldering; viscoplasticity; ASIC; Pb-Sn; barrier layer; ceramic column grid array; coated solder column; flip-chip carrier; lifetime analysis; microprocessor chip; module assembly; nonlinear finite element model; organic FR-4 card; viscoplastic deformation; Application specific integrated circuits; Assembly; Ceramics; Electronics packaging; Environmentally friendly manufacturing techniques; Finite element methods; Lead; Microprocessor chips; Preforms; Tin;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components & Technology Conference, 2000. 2000 Proceedings. 50th
Conference_Location :
Las Vegas, NV
Print_ISBN :
0-7803-5908-9
Type :
conf
DOI :
10.1109/ECTC.2000.853383
Filename :
853383
Link To Document :
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