Title :
Development of a compact model for Tunnel FETs designed for circuit simulation
Author :
Schmidt, Matthias ; Galup-Montoro, Carlos
Author_Institution :
Laboratory of Integrated Circuits, Centro Tecnológico/Universidade Federal de Santa Catarina, Florianópolis (SC), Brazil
Abstract :
This paper demonstrates for the first time a compact model for Tunnel FETs (TFETs), developed for IC simulations. The model is based on Kane´s Model for band-to-band-tunneling. The proposed model is applied to the transfer and the gm/ID characteristics of various TFET structures, both experimental and TCAD-simulated. We find a good agreement between the devices and our model. The agreement is improved for those TFETs which have an enhanced electrostatic gate control.
Keywords :
Integrated circuit modeling; Logic gates; MOSFET; Semiconductor process modeling; Silicon; Tunneling; circuit simulations; tunnel FETs; ultra-low power applications;
Conference_Titel :
Circuits & Systems (LASCAS), 2015 IEEE 6th Latin American Symposium on
Conference_Location :
Montevideo, Uruguay
DOI :
10.1109/LASCAS.2015.7250436
