Title :
On the functional test of the cache coherency logic in multi-core systems
Author :
Acle, J.Perez ; Cantoro, R. ; Sanchez, E. ; Reorda, M.Sonza
Author_Institution :
Facultad de Ingeniería, Universidad de la República, Montevideo, Uruguay
Abstract :
Multi-core systems are becoming particularly common, due to the high performance they can deliver. Their performance strongly depends on the availability of effective cache controllers, able to guarantee (among others) the coherence of the caches of the different cores. This paper proposes a method for the test of the cache coherence logic existing within each core in a multi-core system, resorting to a functional approach; this means that the method is based on the generation of a suitable test program, to be run in a coordinated manner on the cores composing the system. The method is able to detect hardware defects affecting this logic. The method was validated on a LEON3 multicore system.
Keywords :
Built-in self-test; Circuit faults; Coherence; Hardware; Multicore processing; Protocols;
Conference_Titel :
Circuits & Systems (LASCAS), 2015 IEEE 6th Latin American Symposium on
Conference_Location :
Montevideo, Uruguay
DOI :
10.1109/LASCAS.2015.7250453