Silicon interposer technology for high-density package

The achievement of rapid advances in integration density and performance of LSI devices is predicated on increasing the total number of Input/Output (I/O) and Power/Ground (P/G) terminals, which, in turn, leads to shrinking design rule of wiring and bump pitch on the organic substrate of a flip-chip package. However, decreasing the bump pitch and wiring rule raises the process cost of fabricating organic substrate. Moreover, it is difficult to obtain highly reliable connections between chip and organic substrate with smaller bumps due to the mismatching of the coefficient of the thermal expansion (CTE). To overcome these problems, a new interposer using silicon (Si) substrate with through plug is developed