DocumentCode :
2173620
Title :
Co-design of signal, power, and thermal distribution networks for 3D ICs
Author :
Lee, Young-Joon ; Jo Kim, Yoon ; Huang, Gang ; Bakir, Muhannad ; Joshi, Yogendra ; Fedorov, Andrei ; Sung Kyu Lim
Author_Institution :
Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA
fYear :
2009
fDate :
20-24 April 2009
Firstpage :
610
Lastpage :
615
Abstract :
Heat removal and power delivery are two major reliability concerns in the 3D stacked IC technology. Liquid cooling based on micro-fluidic channels is proposed as a viable solution to dramatically reduce the operating temperature of 3D ICs. In addition, designers use a highly complex hierarchical power distribution network in conjunction with decoupling capacitors to deliver currents to all parts of the 3D IC while suppressing the power supply noise to an acceptable level. These so called silicon ancillary technologies, however, pose major challenges to routing completion and congestion. These thermal and power/ground interconnects together with those used for signal delivery compete with one another for routing resources including various types of through-silicon-vias (TSVs). This paper presents the work on routing with these interconnects in 3D: signal, power, and thermal networks. We demonstrate how to consider various physical, electrical, and thermo-mechnical requirements of these interconnects to successfully complete routing while addressing various reliability concerns.
Keywords :
integrated circuit design; integrated circuit interconnections; integrated circuit noise; integrated circuit reliability; microchannel flow; network routing; thermal analysis; 3D stacked IC signal codesign reliability; decoupling capacitor; liquid cooling; microfluidic channel; power supply noise; power-ground interconnect; silicon ancillary technology; thermal distribution network; through-silicon-vias resource; Capacitors; Integrated circuit noise; Liquid cooling; Noise level; Power supplies; Power systems; Routing; Silicon; Temperature; Three-dimensional integrated circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09.
Conference_Location :
Nice
ISSN :
1530-1591
Print_ISBN :
978-1-4244-3781-8
Type :
conf
DOI :
10.1109/DATE.2009.5090740
Filename :
5090740
Link To Document :
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