Analysis of RF Flip-chip On-Chip Inductance

Silicon based inductors in flip-chip (FC) configuration are studied. In this work comparison between performance of on-chip inductor in flip chip configuration and wirebond is conducted. Full wave electromagnetic simulation was used to understand the variation of inductor performance with flip chip bump height and in the presence of ground on the package substrate. Results show that the performance of a change in inductance value might exceed 10% according to inductor size and bump height. Inductors in flip-chip environment must be optimised by properly understanding the effect of the eddy current in Si substrate and bump height.