Above BVCEO operation of InP collector HBTs: relevant physics and comparison to other materials such as GaAs and silicon

The effect of secondary impact ionization by the non-initiating carrier on the near avalanche behavior of highspeed InP collector transistors is studied. We show that secondary collector ionization by generated holes traveling back toward the base layer significantly reduces BV_CBO if the hole ionization coefficient is higher than that of electrons [β_p(E)>α_n(E)]: the positive feedback due to a strong secondary ionization sharpens the breakdown characteristic by speeding up carrier multiplication, and decreases separation between the open-base collector-emitter (BV_CEO) and the open-emitter base-collector (BV_CBO) breakdown voltages. The influence of secondary ionization on the BV_CEO-BV_CBO separation has not previously been described. Multiplication coefficient comparisons for representative InP, GaAs and Si collectors indicate that all structures can sustain low-current above BV_CEO operation from a transport (non-thermal) point of view, although the different degrees of secondary ionization in various semiconductors lead to fundamental differences when InP is compared to GaAs and Si since for the latter materials β_p(E)<α_n(E). The collector ionization integral is used to determine the maximum collector voltage before the onset of non-thermal device instabilities for InP devices: we find that for a 2000 Å collector the transistor can be operated well above BV_CEO and up to 90% of BV_CBO when the base is not left open-circuited, in good agreement with measurements on InP/GaAsSb/InP DHBTs.