DocumentCode :
2174284
Title :
CUFFS: An instruction count based architectural framework for security of MPSoCs
Author :
Patel, Krutartha ; Parameswaran, Sri ; Ragel, Roshan G.
Author_Institution :
Sch. of Comput. Sci. & Eng., Univ. of New South Wales, Sydney, NSW
fYear :
2009
fDate :
20-24 April 2009
Firstpage :
779
Lastpage :
784
Abstract :
Multiprocessor system on chip (MPSoC) architecture is rapidly gaining momentum for modern embedded devices. The vulnerabilities in software on MPSoCs are often exploited to cause software attacks, which are the most common type of attacks on embedded systems. Therefore, we propose an MPSoC architectural framework, CUFFS, for an application specific instruction set processor (ASIP) design that has a dedicated security processor called iGuard for detecting software attacks.
Keywords :
circuit analysis computing; embedded systems; instruction sets; logic design; security of data; system-on-chip; MPSoC security; application specific instruction set processor design; embedded devices; embedded systems; instruction count based architectural framework; multiprocessor system on chip architecture; software attack detection; Application software; Australia; Buffer overflow; Computer science; Computer security; Data security; Embedded software; Embedded system; Hardware; Runtime;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09.
Conference_Location :
Nice
ISSN :
1530-1591
Print_ISBN :
978-1-4244-3781-8
Type :
conf
DOI :
10.1109/DATE.2009.5090769
Filename :
5090769
Link To Document :
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