• DocumentCode
    2174365
  • Title

    A novel approach to entirely integrate Virtual Test into test development flow

  • Author

    Lu, Ping ; Glaser, Daniel ; Uygur, Gürkan ; Helmreich, Klaus

  • Author_Institution
    Dept. of Comput. Aided Circuit Design, Friedrich-Alexander-Univ. Erlangen-Nuremberg, Erlangen
  • fYear
    2009
  • fDate
    20-24 April 2009
  • Firstpage
    797
  • Lastpage
    802
  • Abstract
    In this paper, we present an open architecture virtual test environment (VTE) which can be easily integrated into various modularized automatic test systems (ATS) compliant to Open Standard Architecture (OSA). The focus of this paper is to analyze and address the major issues that still prevent the application of virtual test (VT) from day-to-day´s practice. As a pilot demonstration, a VHDL-AMS based VTE is established and an ADC test is performed. The environment is intended to seamlessly interoperate with the test system during test program development procedure.
  • Keywords
    automatic test equipment; hardware description languages; virtual instrumentation; ADC test; ATE systems; Open Standard Architecture; VHDL-AMS based VTE; automatic test systems; open architecture virtual test environment; test development system; test program development; Automatic testing; Circuit testing; Computer architecture; Hardware; Instruments; Life testing; Performance evaluation; Software testing; Standards development; System testing; ATML; Hardware description language; IEEE1641; Simulation; Test generation; VHDL; Virtual Test;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09.
  • Conference_Location
    Nice
  • ISSN
    1530-1591
  • Print_ISBN
    978-1-4244-3781-8
  • Type

    conf

  • DOI
    10.1109/DATE.2009.5090772
  • Filename
    5090772