• DocumentCode
    2175294
  • Title

    OSSS+R: A framework for application level modelling and synthesis of reconfigurable systems

  • Author

    Schallenberg, Andreas ; Nebel, Wolfgang ; Herrholz, Andreas ; Hartmann, Philipp A. ; Oppenheimer, Frank

  • Author_Institution
    Carl von Ossietzky Univ., Oldenburg, Germany
  • fYear
    2009
  • fDate
    20-24 April 2009
  • Firstpage
    970
  • Lastpage
    975
  • Abstract
    Dynamic Partial Reconfiguration (DPR) is a promising technology ready for use, enabling the design of more flexible and efficient systems. However, existing design flows for DPR are either low-level and complex or lack support for automatic synthesis. In this paper, we present a SystemC based modelling and synthesis flow using the OSSS+R framework for reconfigurable systems. Our approach addresses reconfiguration already on application level enabling early exploration and analysis of the effects of DPR. Moreover it also allows quick implementation of such systems using our automatic synthesis flow. We demonstrate our approach using an educational example.
  • Keywords
    field programmable gate arrays; hardware-software codesign; FPGAs; OSSS+R; SystemC-based modelling; application level modelling; automatic synthesis flow; dynamic partial reconfiguration; Design methodology; Dynamic programming; Field programmable gate arrays; Hardware design languages; Information technology; Libraries; Licenses; Object oriented modeling; Programming profession; Runtime;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09.
  • Conference_Location
    Nice
  • ISSN
    1530-1591
  • Print_ISBN
    978-1-4244-3781-8
  • Type

    conf

  • DOI
    10.1109/DATE.2009.5090805
  • Filename
    5090805