• DocumentCode
    2175328
  • Title

    A low-noise 1.6-GHz CMOS PLL with on-chip loop filter

  • Author

    Parker, James ; Ray, Daniel

  • Author_Institution
    Level One Commun. Inc., Sacramento, CA, USA
  • fYear
    1997
  • fDate
    5-8 May 1997
  • Firstpage
    407
  • Lastpage
    410
  • Abstract
    A 1.6 GHz PLL has been fabricated in a 0.6 μm CMOS technology. The PLL consists of an LC-tank circuit, divider, phase detector with charge pump and an on-chip passive loop filter. The VCO exhibits -105 dBc/Hz phase noise at a 200 kHz offset from the carrier. It occupies an active area of 1.5 mm2 and dissipates 90 mW from a single 3 V supply
  • Keywords
    CMOS integrated circuits; UHF integrated circuits; integrated circuit noise; mixed analogue-digital integrated circuits; phase locked loops; phase noise; voltage-controlled oscillators; 0.6 micron; 1.6 GHz; 3 V; 90 mW; CMOS PL; LC-tank circuit; UHF IC; VCO phase noise; charge pump; divider; low-noise PLL; onchip loop filter; passive loop filter; phase detector; CMOS technology; Circuits; Filters; Inductors; Phase detection; Phase locked loops; Phase noise; Radio frequency; Spirals; Voltage-controlled oscillators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference, 1997., Proceedings of the IEEE 1997
  • Conference_Location
    Santa Clara, CA
  • Print_ISBN
    0-7803-3669-0
  • Type

    conf

  • DOI
    10.1109/CICC.1997.606655
  • Filename
    606655
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2175328