Title :
A Prefetching Coordinate Algorithm Which Can Be Used in Multi-core Processors
Author :
Fang, Juan ; Wang, Xiaocui
Author_Institution :
Coll. of Comput. Sci., Beijing Univ. of Technol., Beijing, China
Abstract :
In order to improve the performance of processor there are many studies in improving the utilization of L2 Cache. The studies show that a good prefetching mechanism is one of the most effective ways to improve the performance of L2 Cache. In this paper, we introduce a Prefetching Coordinator in multi-level storage architecture. It monitors the L2 Cache access patterns as well as the L2 Cache status, and dynamically adjusts the aggressiveness of the L2 Cache prefetching activities so as to improve the performance of all system. Then we introduce it into multi-core processor. In our study, we make an improvement in prefetching coordinator according to the specialty of multi-processor, which enhances the utilization of L2 Cache and needs no additional cost.
Keywords :
cache storage; memory architecture; multiprocessing systems; L2 Cache; multicore processor; multilevel storage architecture; prefetching coordinate algorithm; Algorithm design and analysis; Computer science; Multicore processing; Prefetching; Servers; System performance; Time factors; multi-core processor; multi-processor prefetching; prefetch; prefetching cooordinator;
Conference_Titel :
Frontier of Computer Science and Technology (FCST), 2010 Fifth International Conference on
Conference_Location :
Changchun, Jilin Province
Print_ISBN :
978-1-4244-7779-1
DOI :
10.1109/FCST.2010.32