DocumentCode
2176160
Title
On the optimum width of GaAs MESFETs for low noise amplifiers
Author
Taylor, S.S.
Author_Institution
TriQuint Semicond. Inc., Hillsboro, OR, USA
fYear
1998
fDate
11-8 June 1998
Firstpage
139
Lastpage
142
Abstract
A derivation of the optimum device width for minimizing noise figure at a specified bias current is presented for a cascode LNA circuit topology in GaAs MESFET technology. This configuration achieves excellent third-order intercept and input return loss by employing source and series gate inductance. The resulting noise figure can be chosen close to F/sub min/, or traded for acceptable noise figure and/or input IP3 at reduced current consumption. Computer simulations confirm the predicted results.
Keywords
III-V semiconductors; Schottky gate field effect transistors; UHF amplifiers; UHF field effect transistors; gallium arsenide; semiconductor device noise; GaAs; GaAs MESFETs; cascode LNA circuit topology; input return loss; low noise amplifiers; noise figure; optimum width; series gate inductance; specified bias current; third-order intercept; Circuit noise; FETs; Gallium arsenide; Impedance matching; Inductors; Low-noise amplifiers; MESFETs; Noise figure; Semiconductor device noise; Transconductance;
fLanguage
English
Publisher
ieee
Conference_Titel
Radio Frequency Integrated Circuits (RFIC) Symposium, 1998 IEEE
Conference_Location
Baltimore, MD, USA
ISSN
1097-2633
Print_ISBN
0-7803-4439-1
Type
conf
DOI
10.1109/RFIC.1998.682066
Filename
682066
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