DocumentCode
2176169
Title
A novel parallel architecture for a switched-capacitor bandpass sigma-delta modulator
Author
Farag, Emad N. ; Yan, Ran-Hong ; Elmasry, Mohamed I.
Author_Institution
Waterloo Univ., Ont., Canada
Volume
1
fYear
1997
fDate
3-6 Aug 1997
Firstpage
9
Abstract
In this paper, we apply parallelism by 4× of analog signal processors to the design of a bandpass sigma-delta modulator. We show that the overall speed of the modulator is increased without increasing the speed requirement of the individual building blocks. Several architectures are considered in terms of their resilience to implementation details such as mismatch and gain errors. A switched capacitor circuit is also presented for the proposed modulator
Keywords
analogue processing circuits; parallel architectures; sigma-delta modulation; switched capacitor networks; analog signal processors; gain errors; mismatch; overall speed; parallel architecture; speed requirement; switched-capacitor bandpass sigma-delta modulator; Analog-digital conversion; Bandwidth; Delta-sigma modulation; Dynamic range; Frequency; Parallel architectures; Signal design; Signal processing; Signal sampling; Transfer functions;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on
Conference_Location
Sacramento, CA
Print_ISBN
0-7803-3694-1
Type
conf
DOI
10.1109/MWSCAS.1997.666021
Filename
666021
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