DocumentCode
2177039
Title
Analog subcircuit maintenance in mixed-signal CMOS VLSI circuits
Author
Chu, Wei-Shang ; Current, K. Wayne
Author_Institution
Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA
Volume
1
fYear
1997
fDate
3-6 Aug 1997
Firstpage
139
Abstract
A new analog subsystem design approach is presented that can be used to improve the accuracy, reliability, yield, and testability of analog and mixed-signal CMOS ICs. The proposed scheme is a generally applicable design approach that combines hybrid redundancy, direct subcircuit parameter adjustment, and on-chip analog function verification. Improvements are realized in a system-transparent fashion through function block commutation. The cost is a moderate die area increase. Although applicable to any moderately complex analog function, the example analog function used to illustrate this new design approach presented here is the op amp. Experimental data demonstrate the capabilities of this new design approach
Keywords
CMOS analogue integrated circuits; VLSI; built-in self test; design for testability; integrated circuit design; integrated circuit testing; mixed analogue-digital integrated circuits; operational amplifiers; redundancy; accuracy; analog CMOS IC; analog subcircuit maintenance; cost; direct subcircuit parameter adjustment; hybrid redundancy; mixed-signal CMOS VLSI circuits; on-chip analog function verification; reliability; testability; yield; Built-in self-test; CMOS analog integrated circuits; Circuit testing; Costs; Maintenance; Operational amplifiers; Redundancy; Signal design; Very large scale integration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on
Conference_Location
Sacramento, CA
Print_ISBN
0-7803-3694-1
Type
conf
DOI
10.1109/MWSCAS.1997.666052
Filename
666052
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