DocumentCode
2177043
Title
Unaided 2.5 Gb/s silicon bipolar clock and data recovery IC
Author
Gutierrez, G. ; Shyang Kong
Author_Institution
AMCC, San Diego, CA, USA
fYear
1998
fDate
11-8 June 1998
Firstpage
173
Lastpage
176
Abstract
We will describe a low cost and low power Si Bipolar IC for clock and data recovery at 2.488 Gb/s that requires no external reference. The design is based on a digital quadri-correlator that has inherent low phase offset and allows the use of passive loop filters. The clock recovery unit (CRU) has broad locking range that makes it robust against power supply and temperature variations.
Keywords
bipolar digital integrated circuits; clocks; correlators; digital phase locked loops; elemental semiconductors; passive filters; silicon; 2.5 Gbit/s; Si; clock recovery unit; data recovery; digital quadri-correlator; lock detector; passive loop filter; phase offset; silicon bipolar IC; Bipolar integrated circuits; Clocks; Frequency; Integrated optics; Optical filters; Optical receivers; Optical transmitters; Phase locked loops; Silicon; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Radio Frequency Integrated Circuits (RFIC) Symposium, 1998 IEEE
Conference_Location
Baltimore, MD, USA
ISSN
1097-2633
Print_ISBN
0-7803-4439-1
Type
conf
DOI
10.1109/RFIC.1998.682074
Filename
682074
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