Coupled high-speed interconnect analysis on parallel platforms

Signal integrity analysis is becoming extremely important in validation of high-speed designs. In a system containing high-speed interconnects, the presence of a large number of coupled lines presents difficult challenges for performing fast simulations. In this paper, a novel parallel algorithm based on both physical and time-domain partitioning is proposed that allows for the efficient analysis of circuits containing large number of coupled lines. The proposed method exploits the recently developed method of combining transverse partitioning and waveform relaxation. Examples are provided to demonstrate the efficiency and scalability of the proposed algorithm.