Analysis of signal integrity/power integrity in multilayer printed circuit board and two improving methods

Author

Kang, Hee-Do ; Kim, Hyun ; Yook, Jong-Gwan

Author_Institution

Dept. of Electr. & Electron. Eng., Yonsei Univ., Seoul, South Korea

fYear

2008

fDate

10-12 Dec. 2008

Firstpage

210

Lastpage

213

Abstract

The signal integrity (SI) and power integrity (PI) in multilayer printed circuit board is analyzed using three-dimensional (3D) full EM simulation and the circuit simulation. As a result of that, the dominant factor of SI/PI on the test board is noise coupling by GND via. Hence, two methods are applied to suppress the coupling; differential signaling and anti-via structure. Using these two methods, the noise on the signal line and power via can be suppressed, remarkably. Therefore, the SI/PI in multilayer PCB can be guaranteed to the low noise level.

Keywords

circuit noise; circuit simulation; printed circuits; GND via; anti-via structure; circuit simulation; differential signaling; multilayer PCB; multilayer printed circuit board; noise coupling; power integrity; signal integrity; three-dimensional full EM simulation; Analytical models; Circuit analysis; Circuit noise; Circuit simulation; Circuit testing; Coupling circuits; Noise level; Nonhomogeneous media; Printed circuits; Signal analysis;

fLanguage

English

Publisher

ieee

Conference_Titel

Advanced Packaging and Systems Symposium, 2008. EDAPS 2008. Electrical Design of

Conference_Location

Seoul

Print_ISBN

978-1-4244-2633-1

Electronic_ISBN

978-1-4244-2634-8

Type

conf

DOI

10.1109/EDAPS.2008.4736037

Filename

4736037