Title :
Applying Reduced Precision Arithmetic to Detect Errors in Floating Point Multiplication
Author :
Seetharam, K. ; Keh, Lance Co Ting ; Nathan, Ralph ; Sorin, Daniel J.
Author_Institution :
Dept. of Electr. & Comput. Eng., Duke Univ., Durham, NC, USA
Abstract :
Prior work developed an efficient technique, called reduced precision checking, for detecting errors in floating point addition. In this work, we extend reduced precision checking (RPC) to multiplication. Our results show that RPC can successfully detect errors in floating point multiplication at relatively low cost.
Keywords :
error detection; floating point arithmetic; RPC; error detection; floating point multiplication; reduced precision checking artihmetic; Adders; Computational modeling; Floating-point arithmetic; Hardware; Software; Transient analysis; Wires; error detection; fault tolerance; floating point;
Conference_Titel :
Dependable Computing (PRDC), 2013 IEEE 19th Pacific Rim International Symposium on
Conference_Location :
Vancouver, BC
DOI :
10.1109/PRDC.2013.44
