Title :
Strengthening properties using abstraction refinement
Author :
Purandare, Mitra ; Wahl, Thomas ; Kroening, Daniel
Author_Institution :
Comput. Syst. Inst., ETH Zurich, Zurich
Abstract :
Model checking is an automated formal method for verifying whether a finite-state system satisfies a user-supplied specification. The usefulness of the verification result depends on how well the specification distinguishes intended from non-intended system behavior. Vacuity is a notion that helps formalize this distinction in order to improve the user´s understanding of why a property is satisfied. The goal of this paper is to expose vacuity in a property in a way that increases our knowledge of the design. Our approach, based on abstraction refinement, computes a maximal set of atomic subformula occurrences that can be strengthened without compromising satisfaction. The result is a shorter and stronger and thus, generally, more valuable property. We quantify the benefits of our technique on a substantial set of circuit benchmarks.
Keywords :
circuit CAD; formal verification; integrated circuit testing; temporal logic; abstraction refinement; circuit benchmarks; finite-state system; formal verification; model checking; system behavior; temporal logic; user-supplied specification; Circuits; Contracts; Hardware; Laboratories; Logic design;
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09.
Conference_Location :
Nice
Print_ISBN :
978-1-4244-3781-8
DOI :
10.1109/DATE.2009.5090935