Memristor-based comparator with programmable hysteresis

In this paper, we adopt a memristor network to implement a voltage comparator with programmable hysteresis. The basic building block is based on chopping technique which has been used to control the charge integrated in the device in order to avoid drift effects. By doing this, the memristance value can be preserved, thus obtaining a programmable resistance that can be used in several circuital configurations. Its minimum size is orders of magnitude less than that of a standard resistor implemented in CMOS, which means a significant reduction in silicon area. Moreover, the memristance can be easily programmed through digital pulses. The functionality of the comparator has been simulated. Varying the flux across any of the memristors will change the comparator´s hysteresis.