DocumentCode
2179172
Title
Addition transducer for double base number system
Author
Wangjitman, Kriangyut ; Surarerks, Athasit
Author_Institution
Dept. of Comput. Eng., Chulalongkorn Univ., Bangkok
fYear
2006
fDate
Oct. 18 2006-Sept. 20 2006
Firstpage
994
Lastpage
999
Abstract
Double base number system is proposed for performing the fast computational arithmetic. Two integers, two and three, are used to be the bases. Any number can have a representation as a binary array. In this paper, we consider an implementation model for addition which is one of fundamental arithmetic operations. The proposed addition model can be illustrated by a communication network of several Moore machines (transducers). We show that time used for addition is linear on the size of the representation. Consequently, pipeline technique can be applied to speed this operation up
Keywords
digital arithmetic; transducers; Moore machines; addition transducer; binary array; computational arithmetic operations; double base number system; Analog circuits; Automata; Circuit noise; Communication networks; Digital arithmetic; Greedy algorithms; Laboratories; Pipelines; Redundancy; Transducers;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications and Information Technologies, 2006. ISCIT '06. International Symposium on
Conference_Location
Bangkok
Print_ISBN
0-7803-9741-X
Electronic_ISBN
0-7803-9741-X
Type
conf
DOI
10.1109/ISCIT.2006.339926
Filename
4141365
Link To Document