DocumentCode
2179373
Title
A design of FIR filter using CSD with minimum number of registers
Author
Suzuki, Ken´ichi ; Ochi, Hiroshi ; Kinjo, Shigenori
Author_Institution
Fac. of Eng., Ryukyus Univ., Okinawa, Japan
fYear
1996
fDate
18-21 Nov 1996
Firstpage
227
Lastpage
230
Abstract
This paper proposes an algorithm to be used for the VLSI design of a FIR filter using a canonical signed digit (CSD) representation with a minimum number of registers. The coefficients represented by CSD have a common digit pattern, so that they can reduce the number of adders to calculate same digit patterns. The proposed method takes advantage of this technique without using more registers than that of the transfer function
Keywords
FIR filters; VLSI; circuit CAD; circuit optimisation; digital filters; integrated circuit design; CSD representation; FIR filter design; VLSI design; canonical signed digit representation; filter coefficients; registers; transfer function; Adders; Algorithm design and analysis; Convolution; Delay; Design engineering; Filtering; Finite impulse response filter; Stability; Transfer functions; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1996., IEEE Asia Pacific Conference on
Conference_Location
Seoul
Print_ISBN
0-7803-3702-6
Type
conf
DOI
10.1109/APCAS.1996.569260
Filename
569260
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