Title :
Chip Power Model - A New Methodology for System Power Integrity Analysis and Design
Author :
Kulali, Emre ; Wasserman, Evgeny ; Zheng, Ji
Author_Institution :
Apache Design Solutions, Mountain View
Abstract :
A compact SPICE equivalent circuit model of full-chip power network is proposed in this paper to address the system power integrity co-design and optimization. The theory and procedures for the generation of the compact chip power model is described. The accuracy validation of the chip power model is also presented.
Keywords :
SPICE; equivalent circuits; integrated circuit design; integrated circuit modelling; power supply circuits; SPICE equivalent circuit; chip power model; system power integrity analysis; system power integrity co-design; system power integrity optimization; Circuit noise; Design optimization; Equivalent circuits; Integrated circuit modeling; Integrated circuit packaging; Power generation; Power system modeling; SPICE; Timing; Voltage;
Conference_Titel :
Electrical Performance of Electronic Packaging, 2007 IEEE
Conference_Location :
Atlanta, GA
Print_ISBN :
978-1-4244-0883-2
DOI :
10.1109/EPEP.2007.4387176
