DocumentCode :
2183227
Title :
Device Simulation for Future Technologies
Author :
Stettler, Mark ; Kotlyar, Roza ; Rakshit, Titash ; Linton, Tom
Author_Institution :
Process Technol. Modeling, Intel Corp., Hillsboro, OR
fYear :
2009
fDate :
27-29 May 2009
Firstpage :
1
Lastpage :
4
Abstract :
Simulation approaches used in Intel to evaluate the applicability of new devices and materials for future microprocessor technologies are reviewed. Examples discussed include the evaluation of highly stressed materials, III -V HEMT devices, and carbon nanoribbons. The techniques employed are similar to those used in the research community, but focused on efficient evaluation within a versatile infrastructure that works for both development and research.
Keywords :
HEMT integrated circuits; III-V semiconductors; circuit CAD; microprocessor chips; technology CAD (electronics); III-V HEMT device; TCAD; carbon nanoribbon; device simulation; highly stressed material; microprocessor technology; Acoustic scattering; Computational modeling; HEMTs; III-V semiconductor materials; Nanoscale devices; Optical scattering; Organic materials; Phonons; Silicon; Stress;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computational Electronics, 2009. IWCE '09. 13th International Workshop on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-3925-6
Electronic_ISBN :
978-1-4244-3927-0
Type :
conf
DOI :
10.1109/IWCE.2009.5091105
Filename :
5091105
Link To Document :
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