DocumentCode
2184049
Title
Trimming lithography part I: The alternative technology for sub-resolution and sub-wavelength patterning
Author
Atthi, Nithi ; Sriklat, Arreerat ; Jeamsaksiri, Wutthinan ; Hruanun, Charndet ; Poyai, Amporn ; Silapunt, Rardchawadee
Author_Institution
Thai Microelectron. Center (TMEC), Nat. Electron. & Comput. Technol. Center (NECTEC), Pathumthani, Thailand
fYear
2011
fDate
17-19 May 2011
Firstpage
42
Lastpage
45
Abstract
Lithography is the key technology to scale down a size of integrated circuits that will increase the performance of an electronics device (smaller, faster, cheaper, and low power consumption). There are many lithographic techniques which can produce a nanometer feature size. However, the cost for equipment and mask for those techniques is extremely high. Based on this limitation, this paper introduces an alternative patterning technique called Trimming lithography to produce sub-resolution and sub-wavelength features. The results show that as small as 0.18 μm photoresist linewidth can be produced using the 0.8 μm pattern on a conventional binary mask. The trimming lithography can thus be one of the candidates for future lithography.
Keywords
integrated circuits; masks; photolithography; photoresists; binary mask; electronic device; integrated circuits; photoresist linewidth; size 0.8 mum; subresolution patterning; subwavelength patterning; trimming lithography technique; Moore´s law; Next generation lithography; Pattern shrinkage; Sub-resolution patterning; Trimming lithography;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON), 2011 8th International Conference on
Conference_Location
Khon Kaen
Print_ISBN
978-1-4577-0425-3
Type
conf
DOI
10.1109/ECTICON.2011.5947766
Filename
5947766
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