DocumentCode
2185089
Title
Analysis of Series-shunt Peaking network for CMOS Cascaded Amplifiers
Author
Roopkom, Ittipat ; Worapishet, Apisak ; Surakampontorn, Wanlop
Author_Institution
Fac. of Eng., King Mongkut´´s Inst. of Technol., Bangkok
fYear
2006
fDate
Oct. 18 2006-Sept. 20 2006
Firstpage
376
Lastpage
379
Abstract
The series-shunt (SH) peaking network for interstage bandwidth enhancement of a wideband cascaded CMOS amplifier is analyzed in details. By using the triple-resonance concept, both qualitative and quantitative performances of the SH network are investigated. The analysis also enables proper selection of the peaking inductances for optimum bandwidth extension. A design example with practical simulation results is given to verify the theoretical derivation
Keywords
CMOS analogue integrated circuits; amplifiers; network analysis; interstage bandwidth enhancement; peaking inductances; series-shunt peaking network; triple-resonance concept; wideband cascaded CMOS amplifier; Bandwidth; Broadband amplifiers; CMOS technology; Distributed amplifiers; Frequency; Inductance; Inductors; Optical amplifiers; Parasitic capacitance; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications and Information Technologies, 2006. ISCIT '06. International Symposium on
Conference_Location
Bangkok
Print_ISBN
0-7803-9741-X
Electronic_ISBN
0-7803-9741-X
Type
conf
DOI
10.1109/ISCIT.2006.340068
Filename
4141579
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